Modern electronic equipment, such as televisions, radios, cell phones, and computers are generally constructed of solid state devices. Solid state devices include transistors, capacitors, resistors and the like. One type of transistor is a metal oxide semiconductor field effect transistor (MOSFET), such as NMOS, PMOS, or CMOS transistors. MOSFETs may be used in a myriad of electronic devices.
Increasingly, MOSFETs are made smaller to reduce the size and increase performance of electronic equipment. In addition, use of the devices in, for example, high performance logic requires faster operational speed. One way to achieve faster operational speed is to reduce the series resistance of the source, drain, and gate regions. This has been accomplished using metal silicide as a contact material. Titanium silicide, and then cobalt silicide, has been used in CMOS technology. Recently, nickel silicide seems to be the silicide of choice. However, because of the diffusion characteristics of nickel, problems may arise during the silicidation process, such as pipe defects. SUMMARY OF THE INVENTION
According to one embodiment of the invention, a method for nickel silicidation includes providing a substrate having a source region, a gate region, and a drain region, forming a source in the source region and a drain in the drain region, annealing the source and the drain, implanting, after the annealing the source and the drain, a heavy ion in the source region and the drain region, depositing a nickel layer in each of the source and drain regions, and heating the substrate to form a nickel silicide region in each of the source and drain regions by heating the substrate.
Embodiments of the invention provide a number of technical advantages. Embodiments of the invention may include all, some, or none of these advantages. According to one embodiment, MOSFET performance is improved by a method of nickel silicidation that lowers sheet resistance and reduces pipe defects without increasing the thickness of the deposited nickel layer. In one embodiment, such advantages are achieved by amorphizing the silicon in the source and drain regions with a heavy ion. This amorphization method may be simple, effective, inexpensive, and CMOS compatible.
Other technical advantages are readily apparent to one skilled in the art from the following figures, descriptions, and claims.